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about Interface for Adept

PostPosted: Wed Jan 20, 2016 12:13 pm
by kk_kim
Hi all,
I bought a Diligent Anvyl Spartan-6 FPGA Trainer Board last week. I didn't use any FPGA before. But form some online help, I have the xilinx ISE installed. It is recommended to use that IDE for development. However, labview is the main language that I use for most of my project though diligent said they don't have direct bridge between their FPGA board and labview. Searching online leads me to Interface for Adept in labview, I wonder if this library is just similar to xilinx ISE but use labview only? So I can program the Anvyl board on the fly with labview? Many thanks.

Re: about Interface for Adept

PostPosted: Wed Jan 20, 2016 1:40 pm
by samkristoff
Hey kk_kim,

You cannot program the board directly with LabVIEW. The LabVIEW Interface for Adept lets you read and write registers from the HDL code that you write and deploy to the FPGA using Xilinx tools.

Let us know if you have any questions about this.

Thanks!

Re: about Interface for Adept

PostPosted: Wed Jan 20, 2016 1:53 pm
by kk_kim
samkristoff wrote:Hey kk_kim,

You cannot program the board directly with LabVIEW. The LabVIEW Interface for Adept lets you read and write registers from the HDL code that you write and deploy to the FPGA using Xilinx tools.

Let us know if you have any questions about this.

Thanks!

I see. So I still have to use xlinix ISE to develop the code. But I can use the library to load the code to run something via labview, right?

Re: about Interface for Adept

PostPosted: Wed Jan 20, 2016 2:22 pm
by samkristoff
Yes, once you write your VHDL using the xilinx tools you can map registers so that LabVIEW can read / write those registers. So, for example your VHDL could read from a sensor and do some filtering and store the value in a register. LabVIEW could read the register and provide a user interface.

You could also use this method to offload processing from LV to the FPGA but you'll be limited by the speed at which the Adept API can stream data from LV to the FGPA.

Re: about Interface for Adept

PostPosted: Wed Jan 20, 2016 5:32 pm
by kk_kim
samkristoff wrote:Yes, once you write your VHDL using the xilinx tools you can map registers so that LabVIEW can read / write those registers. So, for example your VHDL could read from a sensor and do some filtering and store the value in a register. LabVIEW could read the register and provide a user interface.

You could also use this method to offload processing from LV to the FPGA but you'll be limited by the speed at which the Adept API can stream data from LV to the FGPA.

Sounds very exciting. Two more questions. How do you interfacing FPGA to LV physically? USB? Besides, does this interface for Adept depends on LabVIEW FPGA module? Can I use the LabVIEW FPGA module to do the same thing or Interface for Adept is specific to Xilinx FPGA board and cannot be replaced by LabVIEW FPGA module? Thanks again.

Re: about Interface for Adept

PostPosted: Thu Jan 21, 2016 2:30 pm
by samkristoff
The Adept SDK talked to the FPGA board over USB. The LabVIEW API is built on top of this and this should work for most Digilent FPGA boards (but not all, it depends on what Adept functionality the board supports). This will not work with any other FPGA boards.

The LabVIEW FPGA is not involved in this in any way.

Re: about Interface for Adept

PostPosted: Tue May 17, 2016 7:30 am
by Vlad Mihai
Hi,

I want to program a FPGA with JTAG SMT2 from Digilent via LabVIEW GUI. I've installed the adept libraries and example following the steps prezented here (https://www.labviewmakerhub.com/doku.php?id=libraries:adept:start) but i get an error like this: LVH-Adept.lvlib:DMGR.lvlib:Generate Error.vi

I use LabVIEW 2015 32bit version and 64 bit version and I have installed VI packet manager 2014.

I hope somebody can help me with this error.

Regards,
Vlad

Re: about Interface for Adept

PostPosted: Wed Jul 15, 2020 4:48 am
by ALEXRG27
I am having the same error, using directly the demo , list devices JtagHs2 appears, but when trying to get ID code or Jtag port properties Error code 5004, LVH-Adept.lvlib:DJTG.lvlib:Generate Error.vi<ERR>
DJTG Disable Failed.
It is happening in the DmgrOpen.vi device, dmgr.dll function: dmgrOpen succes=0